The present specification relates generally to multi-dimensional data processing applications and in particular to multi-dimensional convolution for multi-core processors.
Many newer multimedia applications employ multi-core processors. A multi-core processor is one in which more than one processing core is implemented on the same chip. Each processor core is capable of executing instructions independently. Multiple cores allow for parallel processing of instructions and thus are able to provide increased instruction throughput. The processing potential for multi-core processors may be reached through efficient parallel programming practices. As new processing technology arises, new programming methods may be needed to take advantage of new processing features.
Processors often perform operations on large sets of data. One commonly used operation is a convolution. Convolution operations are widely used in many applications including, but not limited to, image processing, pattern recognition, classification, signal processing, three-dimensional (3D) graphics, seismic imaging and other multimedia and scientific applications. These applications typically involve the use of the convolution operation on large multi-dimensional arrays. Operations over the entire multi-dimensional array may be quite processor intensive. In some cases, convolution operations are only needed at certain points within the array and not others. Thus, processing resources may be wasted by performing the convolution operation over the entire multi-dimensional array.